Computing in parallel processing environments

US8738860B1 · kind B1 · utility

Assignee

• Tilera Corporation · US

Inventors

• Patrick Robert Griffin · Brookline, US
• Mathew Hostetter · Brookline, US
• Anant Agarwal · San Jose, US
• Chyi-Chang Miao · Sharon, US
• Christopher D. Metcalf · Wellesley, US
• Bruce E. Edwards · Belmont, US
• Carl Ramey · Westborough, US
• Mark Rosenbluth · Uxbridge, US
• David Wentzlaff · Cambridge, US
• Christopher J. Jackson · Westford, US
• Ben Harrison · Coventry, GB
• Kenneth M. Steele · Stow, US
• John Amann · Holliston, US
• Shane Bell · Shrewsbury, US
• Richard Conlin · Franklin, US
• Kevin Joyce · Hopkinton, US
• Christine Deignan · Stow, US
• Liewei Bao · Westford, US
• Matthew Mattina · Hudson, US
• Ian Rudolf Bratt · Portola Valley, US
• Richard Schooler · Cambridge, US

Key dates

• Filing date: Oct 25, 2011
• Grant date: May 27, 2014
• Expiry date: Jun 20, 2032

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A computing system comprises one or more cores. Each core comprises a processor. In some implementations, each processor is coupled to a communication network among the cores. In some implementations, a switch in each core includes switching circuitry to forward data received over data paths from other cores to the processor and to switches of other cores, and to forward data received from the processor to switches of other cores.