Symbol flipping LDPC decoding system
US8739004B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2012 |
| Grant date | May 27, 2014 |
| Priority date | — |
| Expiry date | Nov 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/41
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present inventions provide a symbol flipping LDPC decoding system. For example, a symbol flipping data processing system is disclosed that includes a low density parity check decoder operable to decode codewords and to identify unsatisfied parity checks, a symbol flipping controller operable to change values of at least one symbol in the codewords based on the unsatisfied parity checks to assist the low density parity check decoder to decode the codewords, a scheduler operable to control a decoding and symbol flipping mode in the low density parity check decoder and the symbol flipping controller, and a hard decision queue operable to store hard decisions for converged codewords from the low density parity check decoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.