Method of manufacturing semiconductor device and semiconductor device
US8741699B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2012 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Sep 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/112
Abstract
Techniques capable of improving the yield of IGBTs capable of reducing steady loss, turn-off time, and turn-off loss are provided. Upon formation of openings in an interlayer insulting film formed on a main surface of a substrate, etching of a laminated insulating film of a PSG film and an SOG film and a silicon oxide film is once stopped at a silicon nitride film. Then, the silicon nitride film and the silicon oxide film are sequentially etched to form the openings. As a result, the openings are prevented from penetrating through an n-type source layer and a p+-type emitter layer having a thickness of 20 to 100 nm and reaching the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.