Variable resistance memory devices

US8742388B2 · kind B2 · utility

Assignee

• SAMSUNG ELECTRONICS CO., LTD. · KR

Inventor

• Jaekyu Lee · Seongnam-si, KR

Key dates

• Filing date: Sep 23, 2011
• Grant date: Jun 3, 2014
• Expiry date: Aug 23, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B63/32

Abstract

Variable resistance memory devices may include a semiconductor layer including first, second, third doped regions, a variable resistance pattern on the semiconductor layer, a lower electrode between the semiconductor layer and the variable resistance pattern, and a first metal silicide pattern in contact with the semiconductor layer. The third doped region may be spaced apart from the first metal silicide pattern, the first doped region may be spaced apart from the third doped region, and a second doped region may be interposed between the first and third doped regions and be in contact with the first metal silicide pattern. The first doped region may have the same conductivity type as the third doped region and a different conductivity type from the second doped region.