Clock-data recovery with non-zero h(−1) target
US8744024B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2011 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Aug 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0062
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a receiver circuit, a node receives a signal that carries data from a transmitter circuit. Moreover, a clock-data-recovery (CDR) circuit in the receiver circuit recovers an at-rate clock signal from the received signal. The CDR circuit recovers the clock signal without converging a first pulse-response precursor of the signal relative to a pulse-response cursor of the signal to approximately zero (e.g., with the first pulse-response precursor h(−1) converged to a non-zero value). Furthermore, the first pulse-response precursor corresponds to at least one precurosor or postcursor of the pulse-response other than the current sample.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.