Multi-stack semiconductor integrated circuit device
US8744349B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 8, 2010 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Jul 10, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/20
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The invention relates to a multi-stack semiconductor integrated circuit device where communication between semiconductor chips can be efficiently carried out by bypassing a number of chips. Each semiconductor chip that forms a multi-stack semiconductor integrated circuit device having a stack structure where four or more semiconductor chips having the same shape are stacked on top of each other is provided with: a first coil for transmission/reception for communication between chips over a long distance; and a second coil for transmission/reception for communication between chips over a short distance, of which the size is smaller than that of the above-described first coil for transmission/reception.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.