Method for clock gating a DSP when not in use
US8745428B2 · kind B2 · utility
2Cited by
3References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 25, 2010 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Apr 3, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information processing apparatus includes a first processing unit, a second processing unit which is different from the first processing unit, a supply unit configured to supply a clock to the first processing unit and the second processing unit, and a control unit configured to control the supply unit in such a manner as to stop a supply of the clock to the second processing unit in response to completion of activation of the second processing unit, and to resume the supply of the clock to the second processing unit in response to completion of activation of the first processing unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.