Clock synchronization across an interface with an intermittent clock signal
US8745430B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2011 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Mar 4, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosed embodiments provide a system that facilitates synchronization between a first component and a second component connected to the first component via an interface in a computer system. During an active state of the interface, the system uses a local time base in the second component to generate a local clock signal that tracks a host clock signal from the first component. Next, during an inactive state of the interface, the system uses the local time base to maintain the local clock signal at the second component. Finally, during a subsequent active state of the interface after the inactive state, the system adjusts the local clock signal to remove clock drift between the local clock signal and the host clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.