Method of on-board wiring
US8745562B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2012 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Dec 5, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A design method of on-board wiring for a designed circuit includes determining a severity as a crosstalk prevention index for a pair of wires based on a generated noise level of a damaging side wire and a permissible noise level of a damaged side wire. The pair of wires is then assigned a severity class (SC) based on the severity determined. The SC is a pre-defined value range(s) for severity classification. Based on a preset SC specific permissible value list, one or more by-design permissible values belonging to the SC is generated for a design element of the pair of wires. A layout of the pair of wires on a board is constructed based on the by-design permissible value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.