Grinding/electrolysis combined multi-wire-slicing processing method for silicon wafers
US8747625B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2010 |
| Grant date | Jun 10, 2014 |
| Priority date | — |
| Expiry date | Sep 26, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A grinding/electrolysis combined multi-wire-slicing processing method for silicon wafers includes the following steps: first, with a metal slicing wire (10) provided on a multi-wire-slicing machine serving as cathode, a silicon rod or a silicon ingot (1) (anode) is processed by grinding/electrolysis combined multi-wire-slicing through application of a voltage; second, during said processing, the metal slicing wire (10) and the silicon rod or a silicon ingot (1) are connected with a low-voltage continuous or pulsed direct current power supply (9); third, an electrolytic liquid is sprayed into the cutting area to ensure cooling and anode erosion. The method reduces macroscopic cutting force and enables a grinding/electrolysis combined multi-wire-slicing processing method for large size ultra-thin silicon wafers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.