Nonvolatile semiconductor memory device
US8748965B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2011 |
| Grant date | Jun 10, 2014 |
| Priority date | — |
| Expiry date | May 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell transistor obtained by sequentially stacking the gate insulation film, the floating gate electrode, the interelectrode insulation film, and the control gate electrode over the channel semiconductor layer. The control gate electrode has a structure obtained by sequentially stacking the semiconductor film, the silicide phase-change suppressing layer, and the silicide film. In addition, the silicide phase-change suppressing layer includes a polycrystalline silicon film in which at least one of C, F, and N is doped in a concentration range of 1×1020 to 5×1021 [atom/cm3].
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.