Clamping circuit to a reference voltage for ultrasound applications
US8749099B2 · kind B2 · utility
4Cited by
11References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2012 |
| Grant date | Jun 10, 2014 |
| Priority date | — |
| Expiry date | Jul 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09443
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clamping circuit includes a clamping core connected to an output terminal and having a central node connected to a voltage reference and at least one first and one second clamp transistor, connected to the central node and having respective control terminals, the clamping core being also connected at the input to a low voltage input driver block. The clamping core includes a first switching off transistor connected to the output terminal and to the first clamp transistor, as well as a second switching off transistor connected to the output terminal and to the second clamp transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.