Gate-based output power level control power amplifier
US8749309B2 · kind B2 · utility
18Cited by
29References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2011 |
| Grant date | Jun 10, 2014 |
| Priority date | — |
| Expiry date | Jan 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/465
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A gate power control technique for a power amplifier (PA) provides practical improved efficiency at backed-off power levels. It can be applied to the main gate of the output stage of the PA, the cascode gate, or any combination thereof. Both voltage mode and current mode signal processing may be used. The gate power control can be implemented in both open-loop and closed-loop using AC and DC coupled drivers and output stages. It may further use one or more control ports in the radio frequency (RF) signal path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.