Multi-level amplitude signaling receiver
US8750406B2 · kind B2 · utility
22Cited by
11References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2012 |
| Grant date | Jun 10, 2014 |
| Priority date | — |
| Expiry date | Aug 4, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/06
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
One embodiment relates to a receiver circuit for multi-level amplitude signaling which includes at least three amplitude levels for each symbol period. The receiver circuit includes a peak detector, a reference voltage generator, and a comparator circuit. The peak detector is arranged to detect a peak voltage of the multi-level amplitude signal, and the reference voltage generator uses the peak voltage to generate multiple reference voltages. The comparator circuit uses the multiple reference voltages to detect an amplitude level of the multi-level amplitude signal. Other embodiments and features are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.