Patent · US Active

System and method for testing serial ports

US8751182B2 · kind B2 · utility

0Cited by
1References
19Claims
0Family size

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Key dates

Filing dateAug 15, 2011
Grant dateJun 10, 2014
Priority date
Expiry dateAug 21, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/25
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In a system and method for testing a serial port of a computing device, the serial port electronically connects to a test fixture. Test data is sent to a receive data (RXD) pin by a transmit data (TXD) pin. A test result is received from the serial port by the RXD pin. The TXD pin and the RXD pin work normally if the test data is identical to the test result. When voltages of a request to send (RTS) pin and a data terminal ready (DTR) pin are set at high level, the RTS pin, a data carrier detect (DCD) pin, the DTR pin, a ring indicator (RI) pin, a data send ready (DSR) pin and a clear to send (CTS) pin work normally, upon the condition that status values of the serial port indicate the voltages of the above six pins are at high level.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.