System and method for inter-processor communication
US8755309B2 · kind B2 · utility
1Cited by
6References
15Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 26, 2008 |
| Grant date | Jun 17, 2014 |
| Priority date | — |
| Expiry date | Jan 24, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A means for reliable inter-processor communication in a multi-processor system is described. In accordance with one aspect, a specially-configured serial bus is used as a general-purpose data link between a first processor and a second processor. The serial bus may be an Inter-IC Sound (I2S) bus. In accordance with another aspect, a network interface residing on a second processor is made available to a first processor via a data link established over an I2S bus. This allows the second processor to be used as a proxy and to support remote configuration and network address traversal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.