Multi-level assurance trusted computing platform
US8756417B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 4, 2014 |
| Grant date | Jun 17, 2014 |
| Priority date | — |
| Expiry date | Feb 4, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-mode Trusted Computing Platform (TCP) comprising a Field Programmable Gate Array (FPGA) device that includes a Type-1-compliant root of trust (ROT), a memory containing a Type-1 security boot image and at least one lower-security boot image, and a memory containing a Type-1-associated operating system (OS) image and at least one lower-security-associated OS image. The TCP is configured to execute a multi-stage boot process that, depending on the presence of one or more valid external inputs, selects and initiates either a Type-1 TCP computing mode or a lower-assurance computing mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.