Flash memory device and flash memory programming method equalizing wear-level
US8756464B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2008 |
| Grant date | Jun 17, 2014 |
| Priority date | — |
| Expiry date | Sep 7, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5647
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are a flash memory device and flash memory programming method that equalizes a wear-level. The flash memory device includes a memory cell array, an inversion determining unit to generate a programming page through inverting or not inverting a data page based on a number of ‘1’s and ‘0’s in the data page, a programming unit to store the generated programming page in the memory cell array; and a data verifying unit to read the programming page stored in the memory cell array, to restore the data page from the programming page according to whether an error exists in the read programming page, and to output the restored data page, and thereby can equalize a wear-level of a memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.