Non-volatile semiconductor memory device
US8760908B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2011 |
| Grant date | Jun 24, 2014 |
| Priority date | — |
| Expiry date | Sep 27, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/71
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor memory device includes: a memory cell array which has a plurality of first lines, a plurality of second lines intersecting the plurality of first lines and a plurality of memory cells which store an electrically rewritable resistance value as data in a non-volatile manner; a first decoder which is connected to one ends of the plurality of first lines and selects the first lines; a second decoder which is connected to the plurality of second lines and selects the second lines; and a voltage applying circuit which is connected to one of the first and second decoders and which applies a predetermined voltage between the first and second lines selected by the first and second decoders. The second decoder sequentially selects the second lines in a direction from the other ends to the one ends of the first lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.