System and method for the aggregation of 10GBASE-R signals into pseudo 100GBASE-R signals
US8761209B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2011 |
| Grant date | Jun 24, 2014 |
| Priority date | — |
| Expiry date | Dec 18, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/413
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An Ethernet physical layer (PHY) module is provided with a method for transceiving between a 10GBASE-R client interface and a 100G attachment interface. On each of ten client interface logical lanes a 10GBASE-R signal is accepted. Each 10GBASE-R logical lane is demultiplexed into two 5 gigabit per second (Gbps) pseudo 100GBASE-R logical lanes, creating a total of twenty pseudo 100GBASE-R logical lanes. The pseudo 100GBASE-R logical lanes are arranged into n groups of 20/n pseudo 100GBASE-R logical lanes. Further, the pseudo 100GBASE-R logical lanes from each group are arranged into a 100G attachment logical lane. Finally, a 100G attachment logical lane is transmitted at an attachment interface on each of n physical lanes. In the reverse direction, each of n physical lanes accepts a 100G attachment logical lane at the attachment interface, and a de-aggregation process supplies a 10GBASE-R signal on each of ten client interface logical lanes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.