Patent · US Active

Serial protocol for agile sample rate switching

US8761236B2 · kind B2 · utility

0Cited by
40References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 12, 2012
Grant dateJun 24, 2014
Priority date
Expiry dateApr 12, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L25/0266
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

The invention provides a communication protocol and serial interface having an approximately fixed interface clock and capable of accommodating a variety of communication rates. The interface employs a variable-length frame that may be expanded or reduced to obtain a desired communication rate, even though the interface clock rate is held approximately constant. The invention further provides a method for designing an agile barrier interface. In particular, the barrier clock rate is preferably selected to be an approximate common multiple of the various communication rates that the barrier interface must handle. The frame length corresponding to each communication rate may then be obtained by dividing the barrier clock rate by the ΣΔ rate. Finally, the invention provides an agile barrier capable of communicating data across a serial interface at a variety of data rates and at an approximately fixed interface clock rate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.