Three dimensional semiconductor memory devices and methods of forming the same
US8765538B2 · kind B2 · utility
3Cited by
0References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2013 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Oct 23, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/693
Abstract
Provided are three-dimensional semiconductor memory devices and methods of forming the same. The device includes a substrate, conductive patterns stacked on the substrate, and an active pattern penetrating the conductive patterns to be connected to the substrate. The active pattern may include a first doped region provided in an upper portion of the active pattern, and a diffusion-resistant doped region overlapped with at least a portion of the first doped region. The diffusion-resistant doped region may be a region doped with carbon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.