Display panel and manufacturing method thereof
US8766288B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2012 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | May 31, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/173
Abstract
A display panel includes a substrate, a plurality of bottom electrodes, an isolation layer, a plurality of light emitting layers, a top electrode, and at least one first auxiliary electrode. The bottom electrodes and the isolation layer are disposed on the substrate. The isolation layer has a plurality of pixel region openings and at least one buffer region. Each of the pixel region openings respectively exposes the corresponding bottom electrode. The buffer region is disposed between two adjacent pixel region openings. The light emitting layers are respectively disposed on the corresponding bottom electrodes. The top electrode covers the light emitting layers, the isolation layer, and the buffer region. The first auxiliary electrode is disposed in the buffer region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.