Multi-stage voltage regulator
US8766610B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 16, 2013 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Jan 16, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45702
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided is a voltage regulator capable of reducing an influence of an offset to obtain an accurate output voltage. The voltage regulator includes: a first stage amplifier for amplifying and outputting a difference between a reference voltage and a divided voltage obtained by dividing a voltage output by an output transistor, to thereby control a gate of the output transistor; and a cascode amplifier circuit, in which the first stage amplifier includes: a first high breakdown voltage NMOS transistor as an input transistor; and an NMOS transistor as a tail current source, and in which the cascode amplifier circuit includes a second high breakdown voltage NMOS transistor as a cascode transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.