Electrostatic discharge protection circuit and electrostatic discharge protection method
US8767359B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2011 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Jul 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An ESD protection circuit and method for its use are provided. The circuit comprising: a discharge path formed by first and second NMOS transistors which are sequentially connected between a ground and a power supply; an ESD event detection unit; first and second drive units respectively connected between an output of the ESD event detection unit and a gate of the first transistor and between the output of the ESD event detection unit and a gate of the second transistor. The first and second drive units respectively cause the first and second transistors to be turned on during an ESD event and to be turned off when there is no ESD event.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.