Non-volatile dynamic random access memory system with non-delay-lock-loop mechanism and method of operation thereof
US8767463B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2011 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Jun 28, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/0009
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operation of a non-volatile dynamic random access memory system including: accessing a dynamic random access memory; managing a delay-locked-loop control in the dynamic random access memory; sourcing timing inputs to the dynamic random access memory by a control logic unit with the delay-locked-loop control disabled including: selecting a back-up interface through a first multiplexer and a second multiplexer, asserting an on-board termination, and accessing data in the dynamic random access memory by the control logic unit at a lower frequency; and enabling a memory control interface by the control logic unit, with the delay-locked-loop control enabled including: selecting a host interface through the first multiplexer, the second multiplexer, or a combination thereof, disabling the on-board termination, and accessing the data in the dynamic random access memory by the memory control interface at a delay-locked-loop frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.