Video decoder parallelization for tiles
US8767824B2 · kind B2 · utility
22Cited by
5References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2011 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | May 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/184
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for decoding video includes receiving a frame of the video that includes at least one slice and at least one tile. Each of the at least one slice and the at least one tile are not all aligned with one another. Each of the at least one slice is characterized that it is decoded independently of the other the at least one slice. Each of the at least one tile is characterized that it is a rectangular region of the frame and having coding units for the decoding arranged in a raster scan order. The at least one tile of the frame are collectively arranged in a raster scan order of the frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.