System and method for de-modulating a high-supply-domain differential signal and a common-mode clock in a front-end receiver
US8767841B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2013 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Mar 4, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0276
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques for de-modulating a high-supply-domain differential signal and a common-mode clock in a front-end receiver are described herein. In one embodiment, a method for receiving a signal comprises receiving the signal via a receiver input, the received signal comprising a differential signal and a common-mode clock signal. The method also comprises shifting the received signal from a first voltage range to a second voltage range that is lower than the first voltage range, and providing the shifted received signal on a first level-shifted signal line and a second level-shifted signal line. The method further comprises sensing voltage differences between the first and second level-shifted lines to recover the differential signal, and sensing common-mode voltages on the first and second level-shifted signal lines to recover the common-mode clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.