Compact switched-capacitor FIR filter implementation
US8768998B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2011 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Jul 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H19/004
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system is provided to perform non-recursive signal processing using a sampled data technique and a parallel network of switched-capacitor filters. The input analog signal is sampled in a time sequence manner at regular time intervals to obtain analog-valued samples. These samples are collected into data blocks that are assembled into a set of data blocks. The successive data blocks belonging to a set of data blocks partially overlap with the first data block. The non-recursive signal processing is performed on all of the data blocks of the set substantially simultaneously, using the parallel network to produce a processed analog output signal. Each individual processing path of the parallel network processes a specific data block of the set of data blocks. The number of parallel processing paths is the same as one plus the degree of the polynomial representing the desired or overall input/output equation characterizing the non-recursive signal processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.