Apparatus and method for processing operations in parallel using a single instruction multiple data processor
US8769390B2 · kind B2 · utility
1Cited by
7References
21Claims
0Family size
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Key dates
| Filing date | Feb 2, 2012 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Jun 2, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6561
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A parallel operation processing apparatus and method using a Single Instruction Multiple Data (SIMD) processor are provided. The parallel operation processing apparatus may combine input data of source nodes in a current column with input data of source nodes in a previous column, and may store the combined input data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.