Computing device and method for checking signal transmission line
US8769472B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 29, 2013 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Apr 29, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A signal transmission line check method to be executed by a computing device is described. A to-be-checked signal transmission line group in a displayed printed circuit board (PCB) layout is determined. Whether all signal transmission lines of the to-be-checked signal transmission line group are laid out in a same layer of the displayed PCB layout is checked according to an input serial number of a chipset and layer properties of the to-be-checked signal transmission lines. The signal transmission lines that do not satisfy design standards are determined when not all of the to-be-checked signal transmission lines are laid out in a same layer. A related computing device is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.