Semiconductor storage device comprising a memory cell array including a rectifying element and a variable resistor
US8772754B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 22, 2012 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Feb 22, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/826
Abstract
A method of manufacturing a semiconductor storage device according to an embodiment includes: stacking a first wiring layer; stacking a memory cell layer on the first wiring layer; and stacking a stopper film on the memory cell layer. The method of manufacturing a semiconductor storage device also includes: etching the stopper film, the memory cell layer, and the first wiring layer; polishing an interlayer insulating film to the stopper film after burying the stopper film, the memory cell layer, and the first wiring layer with the interlayer insulating film; performing a nitridation process to the stopper film and the interlayer insulating film to form an adjustment film and a block film on surfaces of the stopper film and the interlayer insulating film, respectively; and forming a second wiring layer on the adjustment film, the second wiring layer being electrically connected to the adjustment film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.