Method, apparatus and system to save processor state for efficient transition between processor power states
US8775836B2 · kind B2 · utility
5Cited by
2References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2011 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Oct 10, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques to provide processor state for implementing a power state transition of a processor. In an embodiment, an operating system executing on a processor detects an opportunity to transition the processor to an idle processor power state. In particular embodiments, the operating system initiates the transition by invoking a task switch, wherein information describing a state of the processor is saved to a task switch segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.