Heterogeneous recovery in a redundant memory system
US8775858B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2013 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Mar 11, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2211/1088
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Providing heterogeneous recovery in a redundant memory system that includes a memory controller, a plurality of memory channels in communication with the memory controller, an error detection code mechanism configured for detecting a failing memory channel, and an error recovery mechanism. The error recovery mechanism is configured for receiving notification of the failing memory channel, for performing a recovery operation on the failing memory channel while other memory channels are performing normal system operations, for bringing the recovered channel back into operational mode with the other memory channels for store operations, for continuing to mark the recovered channel to guard against stale data, for removing any stale data after the recovery operation is complete, and for removing the mark on the recovered channel to allow the normal system operations with all of the memory channels, the removing based on the removing any stale data being complete.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.