Shared fuse wrapper architecture for memory repair
US8775880B2 · kind B2 · utility
7Cited by
8References
15Claims
0Family size
Assignee
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Key dates
| Filing date | May 20, 2010 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Sep 21, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory repair mechanism for the memories clustered across the multiple power domains and can be switched on and off independent of each other, thereby enabling low power operation. Enhancements in the shared Fuse Wrapper Architecture enable sharing of a plurality of parallel links connecting the memory blocks of each power domains to the Shared Fuse Wrapper architecture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.