Apparatus and method for a dual mode standard and layered belief propagation LDPC decoder
US8775915B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2012 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Aug 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6519
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus for a dual mode low density parity check (LDPC) decoder including edge random access memory (RAM), last-in-first-out/first-in-first-out (LIFO/FIFO) RAM, channel RAM, and parallel datapath engines, where the datapath engines include a standard belief propagation decoding (SBD) datapath and a layered belief propagation decoding (LBD) datapath, where the SBD datapath includes a shifter, an accumulator, multiplexers, and a g( )_sbd calculator, and where the LBD datapath includes the shifter, the multiplexers, and a g′( )_lbd calculator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.