Signal processing circuit, inverter circuit, buffer circuit, level shifter, flip-flop, driver circuit, and display device
US8779809B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2011 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Aug 31, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01735
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A signal processing circuit of the present invention includes: first and second input terminals; an output terminal; a bootstrap capacitor; a first output section connected to the second input terminal and the output terminal; a second output section connected to the first input terminal, a first power source, and the output terminal; and an electric charge control section for controlling the electric charge of the bootstrap capacitor, the electric charge control section being connected to the first input terminal, the electric charge control section and the first output section being connected to each other via a relay section for either electrically connecting the electric charge control section and the first output section to each other or electrically blocking the electric charge control section and the first output section from each other, the electric charge control section including a resistor connected to a second power source. This configuration can increase reliability of a bootstrap-type signal processing circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.