Amplifier with variable matching circuit to improve linearity
US8779857B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2010 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Feb 12, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/086
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Techniques for reducing distortion and improving linearity of amplifiers are described. In an exemplary design, an apparatus includes a driver amplifier, a variable matching circuit, and a power amplifier. The driver amplifier amplifies a first RF signal and provides a second RF signal. The variable matching circuit receives the second RF signal and provides a third RF signal. The power amplifier amplifies the third RF signal and provides a fourth RF signal. The variable matching circuit matches a fixed impedance at the output of the driver amplifier to a variable impedance at the input of the power amplifier in order to improve the linearity of the amplifiers. In an exemplary design, the power amplifier includes a first transistor (e.g., an NMOS transistor) of a first type, and the variable matching circuit includes a second transistor (e.g., a PMOS transistor) of a second type that is different from the first type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.