Display panel and display apparatus having the same
US8780032B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 2013 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Oct 14, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0223
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.