Hardware task manager
US8782196B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2012 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Jun 29, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hardware task manager for an adaptive computing system. The task manager indicates when input and output buffer resources are sufficient to allow a task to execute. The task can require an arbitrary number of input values from tasks. Likewise, output buffers must also be available before the task can start to execute and store results. The hardware task manager maintains a counter associated with each buffer. For input buffers, a negative value for the counter means that there is no data in the buffer and the buffer is not ready and the associated task cannot run. Predetermined numbers of bytes, or “units,” are stored into the input buffer and an associated counter is incremented. When the counter value transitions from a negative value to a zero the high-order bit of the counter is cleared indicating the input buffer has sufficient data and is available to be processed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.