H.264 video decoder CABAC core optimization techniques
US8782379B2 · kind B2 · utility
11Cited by
0References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2007 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Jan 10, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/91
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A device employing techniques to optimize Context-based Adaptive Binary Arithmetic Coding (CABAC) for the H.264 video decoding is provided. The device includes a processing circuit operative to implement a set of instructions to decode multiple bins simultaneously and renormalize an offset register and a range register after the multiple bins are decoded. The range register and offset registers may be 32 or 64 bits. The use of a larger range register allows renormalization to be skipped when enough bits are still in the range register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.