Systems and methods for multi-matrix data processing
US8782486B2 · kind B2 · utility
7Cited by
73References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2012 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Mar 15, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/2516
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present inventions are related to systems and methods for data processing. As one example, a data processing system is discussed that includes a data decoder circuit and a matrix select control circuit. The data decoder circuit is operable to apply a data decode algorithm to a decoder input using a selected parity check matrix to yield a decoder output. The matrix select control circuit operable to select one of a first parity check matrix and a second parity check matrix as the selected parity check matrix.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.