Three-dimensional nonvolatile memory device
US8786007B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2009 |
| Grant date | Jul 22, 2014 |
| Priority date | — |
| Expiry date | Aug 26, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, and a plurality of gate electrodes. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicular to the semiconductor substrate. The gate electrodes include a first gate electrode and a second gate electrode. The first gate electrode is disposed on the memory cell region to intersect the active pillars. The second gate electrode is disposed on the contact region, connected to the first gate electrode and comprising metal material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.