Semiconductor package and method for manufacturing the same and semiconductor package module having the same
US8786064B2 · kind B2 · utility
2Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2012 |
| Grant date | Jul 22, 2014 |
| Priority date | — |
| Expiry date | Jan 30, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a semiconductor chip, including: a first substrate having a concave formed on one surface thereof and an opening formed on a bottom surface of the concave; a second substrate contacting the other surface of the first substrate; and a semiconductor chip mounted in the concave.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.