Hadamard transformation of data for video compression
US8787464B1 · kind B1 · utility
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Key dates
| Filing date | Jan 24, 2007 |
| Grant date | Jul 22, 2014 |
| Priority date | — |
| Expiry date | Oct 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/61
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A video processor is described, which is useful for implementing a Hadamard transform process, in compliance with the H.264 standard. The video processor includes an input, for receiving a block of image data. The image data is loaded into an internal register. In response to receiving a SIMD instruction, a multiplier, which incorporates the H.264 Hadamard transform matrix in its associated hardware, processes the block of image data, and writes the resulting partially transformed pixel data back to the internal register, transposing the data during the process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.