Digital re-sampling apparatus using fractional delay generator
US8787513B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2010 |
| Grant date | Jul 22, 2014 |
| Priority date | — |
| Expiry date | Dec 30, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0642
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a digital re-sampling apparatus. The digital re-sampling apparatus includes a sample buffer, a sample buffer control unit, a filter bank, a first delay bank, a fractional delay constant table, a combiner bank, and a second delay bank. The sample buffer temporarily stores an input sample in synchronization with an input sampling frequency. The sample buffer control unit controls writing and reading operations. The filter bank includes a number of digital filters equal to the number of stages, and filters the input sample. The first delay bank differentially delays a filter output value. The fractional delay constant table stores information about re-sampling time. The combiner bank includes a number of adders and multipliers, performs an operation, and outputs a re-sampled value. The second delay bank causes a delay so that output of each combiner can be synchronized with each output of the fractional delay constant table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.