Semiconductor memory device
US8788900B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2013 |
| Grant date | Jul 22, 2014 |
| Priority date | — |
| Expiry date | Apr 23, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.