Through-silicon via structure with patterned surface, patterned sidewall and local isolation

US8791578B2 · kind B2 · utility

Assignee

• Hong Kong Applied Science and Technology Research Institute Company Limited · CN

Inventors

• Pui Chung Simon Law · Sha Tin, CN
• Bin Xie · Beijing, CN
• Dan Yang · Nanhu, CN

Key dates

• Filing date: Nov 12, 2012
• Grant date: Jul 29, 2014
• Expiry date: Nov 12, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/00014
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

This invention discloses a through-silicon via (TSV) structure for providing an electrical path between a first-side surface and a second-side surface of a silicon chip, and a method for fabricating the structure. In one embodiment, the TSV structure comprises a via penetrated through the chip from the first-side surface to the second-side surface, providing a first end on the first-side surface and a second end on the second-side surface. A local isolation layer is deposited on the via's sidewall and on a portion of the first-side surface surrounding the first end. The TSV structure further comprises a plurality of substantially closely-packed microstructures arranged to form a substantially non-random pattern and fabricated on at least the portion of the first-side surface covered by the local isolation layer for promoting adhesion of the local isolation layer to the chip. A majority of the microstructures has a depth of at least 1 μm.