Single-ended sense amplifier for solid-state memories
US8792293B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2012 |
| Grant date | Jul 29, 2014 |
| Priority date | — |
| Expiry date | Feb 23, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described embodiments provide a memory having at least one sense amplifier. The sense amplifier has a first capacitor, an inverting amplifier, a switch, an amplifier, and a second capacitor. The first capacitor is coupled between the input of the sense amplifier and a first node. The inverting amplifier has an input coupled to the first node and an output coupled to an internal node and the switch is coupled between the input and output of the inverting amplifier. The amplifier has an input coupled to the internal node and an output coupled to an output of the sense amplifier and the second capacitor is coupled between the internal node and a control node. When data is to be read from the memory, the second capacitor forces a small voltage reduction onto the intermediate node, helping the sense amplifier resolve the data value stored in the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.