Shift register
US8792609B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2013 |
| Grant date | Jul 29, 2014 |
| Priority date | — |
| Expiry date | Jul 15, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0233
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register is discussed in which a pull-up switching device is turned off positively in a period in which no scan pulse is forwarded for securing drive stability and prevents a picture quality from becoming poor. The shift register in one embodiment includes stages having any one of first and second start pulses, and any one of first to fourth clock pulses to forward a scan pulse in succession, wherein the first and second start pulses are in gate high voltage states for two horizontal periods, with the second start pulse forwarded with a delay of one horizontal period than the first start pulse. The first to fourth clock pulses are in gate high voltages for two horizontal periods, with one horizontal period delay to one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.